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| AL1213A 8-BIT 0.5MSPS DAC GENERAL DESCRIPTION The AL1213A is a CMOS 8-bit D/A converter for general application. This digital to analog converter consists of a R-2R ladder block & an Op amp block. Its maximum conversion rate is 0.5MSPS. FEATURES * * * * * * * Resolution : 8-bit Differential Linearity Error : 0.4 LSB (TYP) Maximum Conversion Rate : 0.5MSPS Supply Voltage : 5V External Voltage Reference Single Voltage Output : 0V to 5V Operation Temperature Range : 0 to 70C TYPICAL APPLICATIONS * * * DVD CDP General purpose Digital to Analog Conversion FUNCTIONAL BLOCK DIAGRAM VRT D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] VRB PD R2R LADDER OP AMP VOUT Rev 2.1 (Apr. 2002) No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties that may result from its use. The content of this datasheet is subject to change without any notice. 1 8-BIT 0.5MSPS DAC AL1213A CORE PIN DESCRIPTION Name DI0 ~ DI7 VRB VRT AOUT VDDA VSSA VBB I/O TYPE ABBR * * * * * * * * * * * AI : Analog Input DI : Digital Input AO : Analog Output DO : Digital Output AP : Analog Power AG : Analog Ground AB : Analog bi-direction port DB : Digital Bidirection port DP : Digital Power DG : Digital Ground DB : Digital Sub Bias I/O Type DI AI AI AO AP AG AG I/O Pad picc_bb pia_bb pia_bb poa_bb vdda vssa vbb Digital Input Data Voltage Reference Bottom (0V) Voltage Reference Top (5V) Analog Voltage Output Analog Power Analog Ground Analog Ground Pin Description 2 AL1213A 8-BIT 0.5MSPS DAC CORE CONFIGURATION VDDA VSSA VBB D[7:0] AL1213A PD VOUT VRT VRB ABSOLUTE MAXIMUM RATINGS Characteristics Supply Voltage Reference Input Voltage Digital Input Voltage Operating Temperature HIGH LOW Symbol VDDA VRT VRB Vinh Vinl Top Typ 5 5.0 0.0 5.0 0.0 0 to 70 Unit V V V V V C NOTES : 1. ABSOLUTE MAXIMUM RATING specifies the values beyond which the device may be damaged permanently. Exposure to ABSOLUTE MAXIMUM RATINGS conditions for extended periods may affect reliability. Each condition value is applied with the other values kept within the following operating conditions and function operation under any of these conditions not implied. 2. All voltages are measured with respect to VSSA, VDDD unless otherwise specified. 3 8-BIT 0.5MSPS DAC AL1213A RECOMMENDED OPERATING CONDITIONS Characteristics Supply Voltage Reference Input Voltage Digital Input Voltage HIGH LOW Symbol VDDA VRT VRB Vinh Vinl Top Min 4.75 0.7 VDDD 0 Typ 5.0 5.0 0.0 Max 5.25 0.3 VDDD 70 Unit V V V V V C Operating Temperature NOTE: It is strongly recommended that to avoid power latch-up all the supply pins (VDDA, VDDD) be driven from the same source. DC ELECTRICAL CHARACTERISTICS (Converter Specifications : VDDA = 5V, VSSA = VBB = 0V, Top = 25C, VRT = 5.0V, VRB = 0.0V Cload = 2pF unless otherwise specified.) Characteristics Resolution Differential Linearity Error Integral Linearity Error Maximum Output Voltage LSB Size Symbol DLE ILE Min 4.75 19.0 Typ 8 0.4 0.8 5 19.5 Max 1 1 5.25 20 Unit Bits LSB LSB V mV 4 AL1213A 8-BIT 0.5MSPS DAC AC ELECTRICAL CHARACTERISTICS (Converter Specifications : VDDA = 5V, VSSA = VBB = 0V, Top = 25C, VRT = 5.0V, VRB = 0.0V Cload = 2pF unless otherwise specified.) Characteristics Conversion Rate Dynamic Supply Current Analog Output Delay Analog Output Rise Time Analog Output Fall Time Center Code Rising Time Symbol fc Ivdd Td Tr Tf Trd Min 1.5 Typ 0.5 2.3 190 230 230 0.3 Max 7.0 270 300 300 0.4 Unit MSPS mA ns ns ns ms Test Conditions data = 0.5MHz fc = 0.5MHz (load cap = 25pF) fc = 0.5MHz Data : All High fc = 0.5MHz Data : All Low All High fc = 0.5MHz Data : All High All Low fc = 0.5MHz Data : 01111111 10000000 Data : 11111111 Data : 11111111 Data : 11111111 PD : 0V Power down on time Power down off time Power down current Tpon Tpof Ipd - 30 240 4 50 ns ns nA 5 8-BIT 0.5MSPS DAC AL1213A TIMING DIAGRAM D[0]-D[7] DATA Td 90% 50% VOUT 10% Ts 1LSB Tr Tf D[0]-D[7] PD Tpof Tpon VOUT +/- 1/2LSB +/- 1/2LSB 1. Output delay measured from the 50% point of the rising edge of input data to the full scale transition. 2. Settling time measured from the 50% point of full scale transition to the output remaining within 1/2 LSB. 3. Output rise/fall time measured between the 10% and 90% points of full scale transition. FUNCTION DESCRIPTION 1. The AL1213A has a R-2R Ladder Block for 8bit and an Opamp Block for driving Output. 2. The R-2R Ladder Block generates binary weighted voltage (VRT/2 VRT/2 VRT/2 . . . VRT/2 ) corresponding to Digital Input Data for n-bit DAC and Output total voltage is summing of each values. 3. In Output voltage, MSB = VRT/21 LSB = VRT/2n 4. Output of the R2R Ladder Block is driven by Opamp 1 2 3 n 6 AL1213A 8-BIT 0.5MSPS DAC CORE EVALUATION GUIDE 5V Cc Ct VDDA VSSA VBB MAIN PATH D[7:0] AL1213A VRB VOUT VRT Ct Cc SELECT Ct Cc 5V 0V TEST PATH Location Ct Cc Description 10mF TANTALUM CAPACITOR 0.1mF CERAMIC CAPACITOR 7 8-BIT 0.5MSPS DAC AL1213A TESTABILITY Whether you use MUX or the internal logic for testability, it is required to be able to select the values of digital inputs (D[0] ~ D[7]). See above figure. Only if it is, you can check the main function (Linearity) PHANTOM CELL INFORMATION VSSA VBB VOUT AL1213A VRT VRB VDDA D[0] PD D[1] D[2] D[3] D[4] D[5] D[6] Pin Name D[7:0] PD VRT VRB VOUT VDDA VSSA VBB Property DI DI AB AB AO AP AG AG Pin Usage Internal / External Internal / External Internal / External Internal / External Internal / External External External External Pin Layout Guide 1. Digital Input Signal lines must have same length to reduce propagation delay. 1. Voltage reference lines (VRT / VRB) must be wide metal to reduce voltage drop of metal lines 2. VOUT signal should not be crossed by any signals and should not run next to digital signals to minimize capacitive coupling between the two signals. 1. It is recommended that you use thick analog power metal. When connected to PAD, the path should be kept as short as possible. 1. When the core block is connected to other blocks, it must be double guard-ring using N-well and P+ active to remove the substrate and coupling noise. In that case, the power metal should be connected to PAD directly. 2. The Bulk power is used to reduce the influence of substrate noise. 8 D[7] AL1213A 8-BIT 0.5MSPS DAC PACKAGE CONFIGURATION Cc Ct 5V 1 2 VDDA NC VBB VDDA VSSA NC NC D[7] D[6] D[5] D[4] D[3] D[2] D[1] NC NC NC NC AOUT VRT VRB 28 27 26 25 24 23 Cc Ct 22 21 20 19 18 17 16 15 D[0] VRT(5V) VOUT 0V 3 4 5 6 7 D[7] D[6] D[5] D[4] D[3] D[2] D[1] 8 9 10 11 12 13 14 AL1213A NC NC NC NC NC NC D[0] VRB(0V) Location Ct Cc L1,L2 Description 10mF TANTALUM CAPACITOR 0.1mF CERAMIC CAPACITOR FERRITE BEAD ( 0.1mh ) 9 8-BIT 0.5MSPS DAC AL1213A PACKAGE PIN DESCRIPTION Name VDDA VBB VSSA DI0 ~ DI7 VRB VRT AOUT NC Pin No 1,4 3 5 8 ~ 15 22 23 24 2,6,7,16,17,18 19,20,21,25,26 27,28 I/O Type AP AG AG DI AI AI AO DO Analog Power Analog Ground Analog Ground Digital Input Data Voltage Reference Bottom (0V) Voltage Reference Top (5V) Analog Voltage Output No Connection Pin Description PC BOARD LAYOUT CONSIDERATIONS PC Board Considerations To minimize noise on the power lines and the ground lines, the digital inputs need to be shielded and decoupled. This trace length between groups of VDD (VDDA, VDDD) and VSS (VSSA, VSSD) pins should be as short as possible so as to minimize inductive ringing. Supply Decoupling and Planes For the decoupling capacitor between the power line and the ground line, 0.1mF ceramic capacitor is used in parallel with a 10mF tantalum capacitor. The digital power plane (VDDD) and analog power plane (VDDA) are connected through a ferrite bead, and also the digital ground plane (VSSD) and the analog ground plane (VSSA). This ferrite bead should be located within 3inches of the AL1213A. The analog power plane supplies power to the AL1213A of the analog output pin and related devices. 10 AL1213A 8-BIT 0.5MSPS DAC FEEDBACK REQUEST We appreciate your interest in out products. If you have further questions, please specify in the attached form. Thank you very much. DC/AC Electrical Characteristic Characteristics Supply Voltage Power dissipation Resolution Analog Output Voltage Operating Temperature Output Load Capacitor Output Load Resistor Integral Non-Linearity Error Differential Non-Linearity Error Maximum Conversion Rate Min Typ Max Unit V mW Bits V C pF LSB LSB MHz Remarks Voltage Output DAC Characteristics Reference Voltage TOP BOTTOM Min Typ Max Unit V V Binary Code or 2's Complement Code Remarks Analog Output Voltage Range Digital Input Format Current Output DAC Characteristics Analog Output Maximum Current Analog Output Maximum Signal Frequency Reference Voltage External Resistor for Current Setting (RSET) Pipeline Delay * * * * Min Typ Max Unit mA MHz V sec Remarks Do you want to Power down mode? Do you want to Internal Reference Voltage (BGR)? Which do you want to Serial Input TYPE or parallel Input TYPE? Do you need 3.3V and 5V power supply in your system? 11 8-BIT 0.5MSPS DAC AL1213A HISTORY CARD Version Ver 1.0 Ver 2.0 Ver 2.1 Date Jun.'98 Feb.'00 Apr.'02 Modified Items Original version published Core layout Guide update Phantom Cell information update Comments 12 |
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